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How to make section position independent Home > The Cortex-M3 Instruction Set > Memory access instructions > ADR
3.4.1. ADRGenerate PC-relative address.
http://gcc.gnu.org/ml/gcc-help/2009-08/msg00188.html
The arm-gcc current -fpic option generates pc-relative addressing
for jumps, calls, and constant pools, and r9-relative addressing
for the .rodata, .data, and .bss sections: this implies that
.rodata (read-only data, which resides in flash) cannot be
allocated separately from .data and .bss (which reside in ram).
http://www.keil.com/support/man/docs/jlink/jlink_algscreate.htm
Create Algorithms
New Flash programming algorithms can be created with μVision. Programming algorithms are defined with functions to erase and program the Flash device. Special compiler and linker settings are required.
Follow these steps to create and configure a new Flash programming algorithm:
- Create a new and empty sub-folder in \KEIL\ARM\FLASH\.
- Copy the content of an existing Flash algorithm to this new folder, for example copy \KEIL\ARM\FLASH\LPC_IAP_256.
- Rename the files LPC_IAP_256.uv2 and LPC_IAP_256.opt to 29F400.uv2 and 29F400.opt, to represent the new Flash ROM device name.
- Open the project with μVision and replace the target name using Project — Manage — Components, Environment, Books....
- Select the device using Project — Options for Target — Device. Ensure to use the correct endianness.
- Device ARM - Cortex-Mx will fit for Cortex-Mx processor-based devices.
- Device ARM - ARM7 will fit for most ARM7 and ARM9 processor-based devices.
- Device ARM - ARM9xxE-S will fit for most ARM9E-S processor-based devices.
- Replace all output names, here LPC_IAP_256, with the new device name. Use the Project — Options for Target — Output dialog.
- Adjust the names in the field Run #1 of the Project — Options for Target — User dialog.
- For ARM7 and ARM9 processor-based devices use the suffix FLX
- For Cortex-M processor-based devices use the suffix FLM
- Enable Read-Only Position Independent and Read-Write Position Independent in both dialogs Project — Options for Target — C/C++ and Project — Options for Target — Asm.
- Open Project — Options for Target — Linker and enter .\Target.lin in the Scatter File field.
- In Misc controls use
- --diag_suppress L6305 for Cortex-M processor-based devices.
- --entry 0 for ARM7 and ARM9 processor-based devices.
- Edit the FlashPrg.c file and create the code for the mandatory functions EraseChip, EraseBlock, and ProgramBlock. Code the optional functions Init and UnInit according to the requirements of the device.
- Edit the FlashDev.c file and define the device parameters within the FlashDevice structure.
- Build the new Flash programming algorithm. The output file, which has the extension *.FLX or *.FLM, contains the programming algorithm. The file is copied to the appropriate folder automatically.
Note
- Use the Add button in the Flash Download dialog to add this programming algorithm to a μVision project.
- The \KEIL\ARM\FLASH\LPC_IAP_256\TEST folder contains a project that shows how to test a new Flash Programming Algorithm.
__ram directive to the function definition. For instruction on how to do the same with the RealView compiler see the EXECUTING FUNCTIONS IN RAM technical support article:
KEIL的帮助手册/ropi, /noropi If you select the /ropi qualifier to generate ROPI code, the compiler:
addresses read-only code and data PC-relative
sets the Position Independent (PI) attribute on read-only output sections.
Note
--apcs=/ropi is not supported when compiling C++.
/rwpi, /norwpi If you select the /rwpi qualifier to generate RWPI code, the compiler:
addresses writable data using offsets from the static base register
sb. This means that:the base address of the RW data region can be fixed at runtime
data can have multiple instances
data can be, but does not have to be, position-independent.
sets the PI attribute on read/write output sections.
Note
Because the --lower_rwpi option is the default, code that is not RWPI is automatically transformed into equivalent code that is RWPI. This static initialization is done at runtime by the C++ constructor mechanism, even for C.
/fpic, /nofpic If you select this option, the compiler:
accesses all static data using PC-relative addressing
accesses all imported or exported read-write data using a Global Offset Table (GOT) entry created by the linker
accesses all read-only data relative to the PC.
You must compile your code with /fpic if it uses shared objects. This is because relative addressing is only implemented when your code makes use of System V shared libraries.
You do not have to compile with /fpic if you are building either a static image or static library.
The use of /fpic is supported when compiling C++. In this case, virtual function tables and typeinfo are placed in read-write areas so that they can be accessed relative to the location of the PC.
Note
When building a System V shared library, use--apcs /fpic together with --no_hide_all.hat would be updated, and one that not. I would suggest create two load sec=
tions in your scatter file, and place each block of code in each section. N=
ote that the sections need to be aligned with memory pages. This way you ca=
n erase one section (by erasing the respective pages) without having to era=
se the other section.
手册linker user guide -
Image structure and generation
http://www.keil.com/support/man/docs/armlink/armlink_bhccdacb.htm
Type 2 image, one load region and non-contiguous execution regions